Intel SoC Micro-Architect in Topeka, Kansas
Intel Programmable Solutions Group (PSG) is looking for a SoC/Solution Micro-Architect for Structured ASIC products. This forward-looking dynamic role provides unique opportunities to influence future product roadmap, requiring a self-starter with strong personal communication and collaboration skills. As a SoC/Solution Micro-Architect, you will be responsible to work on feasibility of customer feature requests, partitioning them effectively between hardware/software and propose an effective implementation which meets the desired Power, Performance and Area targets.
You will need to work with cross functional teams and will be responsible for defining Micro-architecture specifications for the Structured ASIC solutions. You will also work closely with IP and platform implementation teams on the creation of Soft IP blocks, solutions and customer designs to enable those capabilities.
As a SoC Micro-Architect you will be responsible, but not limited to:
Responsible for SoC Frontend Architecture and Design. Define micro-architecture specifications.
Perform feasibility study on different third-party IP and integrate IP at the SOC level.
Closely work with Verification team and help define testplan, run tests and debug design.
Lead the performance model definition and development.
Participate in design reviews of hardware and related software systems.
Run Lint, CDC, Synthesis, STA and formal verification tools, work closely with Backend team on floorplan, Constraints definition and timing analysis.
Participate and drive timing convergence for high speed designs including micro-architecture optimizations
Collaborate with internal and external team members on architectural decisions, development flows and methodologies.
The ideal candidate will demonstrate:
Experience with IA or CPU based SoC designs processor based SoC architectures.
Experience with NoC design and integration with interconnect protocols, such as AXI, ACE, APB, etc.
Expertise in Ethernet, PCIe, TSN will be a plus.
Expert RTL developer using ASIC development techniques and designs flows at modern technology nodes including synthesis and timing closure.
Strong knowledge of digital design involving multiple clock domains and clock power management.
Experience of low power design, tools and methodologies. Power intent UPF specifications knowledge a plus.
Excellent communication and documentation skill. Must be able to influence in heavily matrixed environment.
Ability to operate in ambiguity where roles may not be clearly defined or teams across multiple/functions and IP/SOC must be pulled together.
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
The candidate must have a Bachelor's degree in Computer Engineering, Electrical Engineering or related field.
12+ years of relevant experience in the following areas:
SOC/ASIC Front-End design
RTL developer using ASIC development techniques and designs flows at modern technology nodes including synthesis and timing closure.
Master's degree in Computer Engineering, Electrical Engineering or related field.
6+ years of experience in the following areas:
IA or CPU based SoC designs processor based SoC architectures.
NoC design and integration with interconnect protocols (AXI, ACE or APB).
Digital design involving multiple clock domains and clock power management.
Low power design, tools and methodologies. Power intent UPF specifications.
Ethernet, PCIe or TSN.
Inside this Business Group
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.
US,TX,Austin;US,CA,San Jose;US,CA,Santa Clara
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All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.